TM 11-6625-2616-14
0 to 240 milliseconds, depending on input signal
levels.
f. The termination of clock frequency pulses
Basic timing for the digitizing circuits is pro-
is sensed by Q16 and its associated circuitry,
duced as described in the following paragraphs.
CR13, C24, R4, R32, R58, and R31. This circuit
produces a DC level shift at the collector of
2, secondary 3) feeds R83, R84, R85 and associ-
Q16 and to the base of Q9. The presence of clock
ated capacitors C17, C18, and C19 into diode CR16
pulses forces Q16 into a nonconducting state
and transistor Q8. This results in a square-
which turns Q9 on hard, discharging C8 as de-
waveform output at the collector of Q8 and the
scribed earlier. When clock pulses cease, the col-
base of Q7, Normally Q7 feeds its square-wave
lector voltage of Q16 drops and is coupled as a
output into differentiating capacitor C15 which
short negative pulse through Q16 into Q15. The
forms the sharp pulses that trigger flip-flop U4.
pulse is fed to pins 4 and 13 of U12 through U16,
The change in state of U4 appears at pin 8 and
storing the output of the frequency counter. The
feeds pin 2 of the integrating amplifier and pin
readout now displays the number of clock pulses
5 of the null amplifier. At the instant U4 changes
counted during the discharge period of the in-
state, switching circuits in the null amplifier
tegrating capacitor.
turn on a 500 KHz oscillator Q36, Q37 through
g. The absence of clock pulses allows C8 to
gate amplifiers Q20, Q28, and R62. Circuits in
slowly charge, building up trigger pulses at C15
the integrating amplifier switch on an integrat-
which again fire flip-flop U4, repeating the digitiz-
ing capacitor, C1 (physically located in the null
ing cycle and provides a 200-millisecond delay
amplifier ). C1 begins charging to the signal input
between digitizing cycles.
level.
sistor Q26 which feeds the frequency counter
(U11, U10, U9, U8, and U7) and Q16. Q16 de-
The output of the signal conditioning circuit
tects the presence of an oscillator frequency
board appears at pin 8 of the integrator amplifier.
and turns on Q9 through R76. This causes Q9
R1, C1, and R2 provide further filtering of the
to shunt C8, discharging it and removing the
input signal. CR7 and CR8 limit the input to
collector voltage from Q7 thereby ending further
U1. U1 and C3 form a feedback integrating cir-
triggering of U4.
cuit. CR9, CR10, R13, and the circuit formed by
Q5, Q6, CR1l, CR12, and associated resistors
prevent large saturating voltages from building
drive the frequency counters until a count of
up across U1. U1 feeds R8 and the polarity indi-
100,000 is reached (and a time period of 200
cating circuits, described separately. U1 also feeds
milliseconds). At the 100,000th count, the count-
diode bridge CR1, CR2, CR3, and CR4, placed in
ers are zeroed and the output of U7, pin 11, re-
a feedback loop around U1. The bridge provides
sets flip-flop U4.
a single polarity output (regardless of input polar-
d. As U4 resets, its changed output level at
ity ) to charge the integrating capacitor which is
pin 8 is coupled to both the integrating ampli-
connected externally to the output pins 3 and 4.
fier (pin 2) and the null amplifier (pin 5). Switch-
The bridge is allowed to charge the integrating
ing transistors in the integrating amplifier dis-
capacitor by switching transistors Q1 and Q2
connect the integrating capacitor charging cir-
when Q3 and Q4 are pulsed by the integrating
cuit. Switching circuits in the null amplifier
pulse at pin 2.
connect the constant current reference source (re-
ference assembly) allowing a controlled dis-
5-8. Null Amplifier
charge of the integrating capacitor to take place.
e. The integrating capacitor continues to dis-
charge until it reaches its precharged condition
amplifier (U25) feeds pins 1 and 2 of the null am-
at which time the null amplifier senses the ca-
plifier ( U26 ). The integrating capacitor is con-
pacitor level and switches off the clock frequency
nected across the input pins which also feed the
through transistors Q20 and Q28. The discharge
gate inputs of field effect transistor (FET) Q1. Q1
time of the integrating capacitor will vary from
is connected as a differential amplifier and uses
